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-rw-r--r--vendor/github.com/klauspost/cpuid/v2/README.md3
-rw-r--r--vendor/github.com/klauspost/cpuid/v2/cpuid.go15
-rw-r--r--vendor/github.com/klauspost/cpuid/v2/featureid_string.go437
-rw-r--r--vendor/github.com/klauspost/cpuid/v2/os_darwin_arm64.go80
4 files changed, 277 insertions, 258 deletions
diff --git a/vendor/github.com/klauspost/cpuid/v2/README.md b/vendor/github.com/klauspost/cpuid/v2/README.md
index e59d3d0c0..7b1d59921 100644
--- a/vendor/github.com/klauspost/cpuid/v2/README.md
+++ b/vendor/github.com/klauspost/cpuid/v2/README.md
@@ -285,6 +285,7 @@ Exit Code 1
| AMXCOMPLEX | Tile computational operations on complex numbers |
| AMXTILE | Tile architecture |
| AMXTF32 | Matrix Multiplication of TF32 Tiles into Packed Single Precision Tile |
+| AMXTRANSPOSE | Tile multiply where the first operand is transposed |
| APX_F | Intel APX |
| AVX | AVX functions |
| AVX10 | If set the Intel AVX10 Converged Vector ISA is supported |
@@ -420,6 +421,8 @@ Exit Code 1
| SHA | Intel SHA Extensions |
| SME | AMD Secure Memory Encryption supported |
| SME_COHERENT | AMD Hardware cache coherency across encryption domains enforced |
+| SM3_X86 | SM3 instructions |
+| SM4_X86 | SM4 instructions |
| SPEC_CTRL_SSBD | Speculative Store Bypass Disable |
| SRBDS_CTRL | SRBDS mitigation MSR available |
| SSE | SSE functions |
diff --git a/vendor/github.com/klauspost/cpuid/v2/cpuid.go b/vendor/github.com/klauspost/cpuid/v2/cpuid.go
index 8103fb343..248439a9a 100644
--- a/vendor/github.com/klauspost/cpuid/v2/cpuid.go
+++ b/vendor/github.com/klauspost/cpuid/v2/cpuid.go
@@ -85,6 +85,7 @@ const (
AMXTILE // Tile architecture
AMXTF32 // Tile architecture
AMXCOMPLEX // Matrix Multiplication of TF32 Tiles into Packed Single Precision Tile
+ AMXTRANSPOSE // Tile multiply where the first operand is transposed
APX_F // Intel APX
AVX // AVX functions
AVX10 // If set the Intel AVX10 Converged Vector ISA is supported
@@ -222,6 +223,8 @@ const (
SHA // Intel SHA Extensions
SME // AMD Secure Memory Encryption supported
SME_COHERENT // AMD Hardware cache coherency across encryption domains enforced
+ SM3_X86 // SM3 instructions
+ SM4_X86 // SM4 instructions
SPEC_CTRL_SSBD // Speculative Store Bypass Disable
SRBDS_CTRL // SRBDS mitigation MSR available
SRSO_MSR_FIX // Indicates that software may use MSR BP_CFG[BpSpecReduce] to mitigate SRSO.
@@ -283,7 +286,7 @@ const (
CRC32 // CRC32/CRC32C instructions
DCPOP // Data cache clean to Point of Persistence (DC CVAP)
EVTSTRM // Generic timer
- FCMA // Floatin point complex number addition and multiplication
+ FCMA // Floating point complex number addition and multiplication
FHM // FMLAL and FMLSL instructions
FP // Single-precision and double-precision floating point
FPHP // Half-precision floating point
@@ -878,7 +881,12 @@ func physicalCores() int {
v, _ := vendorID()
switch v {
case Intel:
- return logicalCores() / threadsPerCore()
+ lc := logicalCores()
+ tpc := threadsPerCore()
+ if lc > 0 && tpc > 0 {
+ return lc / tpc
+ }
+ return 0
case AMD, Hygon:
lc := logicalCores()
tpc := threadsPerCore()
@@ -1279,6 +1287,8 @@ func support() flagSet {
// CPUID.(EAX=7, ECX=1).EAX
eax1, _, _, edx1 := cpuidex(7, 1)
fs.setIf(fs.inSet(AVX) && eax1&(1<<4) != 0, AVXVNNI)
+ fs.setIf(eax1&(1<<1) != 0, SM3_X86)
+ fs.setIf(eax1&(1<<2) != 0, SM4_X86)
fs.setIf(eax1&(1<<7) != 0, CMPCCXADD)
fs.setIf(eax1&(1<<10) != 0, MOVSB_ZL)
fs.setIf(eax1&(1<<11) != 0, STOSB_SHORT)
@@ -1290,6 +1300,7 @@ func support() flagSet {
// CPUID.(EAX=7, ECX=1).EDX
fs.setIf(edx1&(1<<4) != 0, AVXVNNIINT8)
fs.setIf(edx1&(1<<5) != 0, AVXNECONVERT)
+ fs.setIf(edx1&(1<<6) != 0, AMXTRANSPOSE)
fs.setIf(edx1&(1<<7) != 0, AMXTF32)
fs.setIf(edx1&(1<<8) != 0, AMXCOMPLEX)
fs.setIf(edx1&(1<<10) != 0, AVXVNNIINT16)
diff --git a/vendor/github.com/klauspost/cpuid/v2/featureid_string.go b/vendor/github.com/klauspost/cpuid/v2/featureid_string.go
index 04760c1af..07704351f 100644
--- a/vendor/github.com/klauspost/cpuid/v2/featureid_string.go
+++ b/vendor/github.com/klauspost/cpuid/v2/featureid_string.go
@@ -19,227 +19,230 @@ func _() {
_ = x[AMXTILE-9]
_ = x[AMXTF32-10]
_ = x[AMXCOMPLEX-11]
- _ = x[APX_F-12]
- _ = x[AVX-13]
- _ = x[AVX10-14]
- _ = x[AVX10_128-15]
- _ = x[AVX10_256-16]
- _ = x[AVX10_512-17]
- _ = x[AVX2-18]
- _ = x[AVX512BF16-19]
- _ = x[AVX512BITALG-20]
- _ = x[AVX512BW-21]
- _ = x[AVX512CD-22]
- _ = x[AVX512DQ-23]
- _ = x[AVX512ER-24]
- _ = x[AVX512F-25]
- _ = x[AVX512FP16-26]
- _ = x[AVX512IFMA-27]
- _ = x[AVX512PF-28]
- _ = x[AVX512VBMI-29]
- _ = x[AVX512VBMI2-30]
- _ = x[AVX512VL-31]
- _ = x[AVX512VNNI-32]
- _ = x[AVX512VP2INTERSECT-33]
- _ = x[AVX512VPOPCNTDQ-34]
- _ = x[AVXIFMA-35]
- _ = x[AVXNECONVERT-36]
- _ = x[AVXSLOW-37]
- _ = x[AVXVNNI-38]
- _ = x[AVXVNNIINT8-39]
- _ = x[AVXVNNIINT16-40]
- _ = x[BHI_CTRL-41]
- _ = x[BMI1-42]
- _ = x[BMI2-43]
- _ = x[CETIBT-44]
- _ = x[CETSS-45]
- _ = x[CLDEMOTE-46]
- _ = x[CLMUL-47]
- _ = x[CLZERO-48]
- _ = x[CMOV-49]
- _ = x[CMPCCXADD-50]
- _ = x[CMPSB_SCADBS_SHORT-51]
- _ = x[CMPXCHG8-52]
- _ = x[CPBOOST-53]
- _ = x[CPPC-54]
- _ = x[CX16-55]
- _ = x[EFER_LMSLE_UNS-56]
- _ = x[ENQCMD-57]
- _ = x[ERMS-58]
- _ = x[F16C-59]
- _ = x[FLUSH_L1D-60]
- _ = x[FMA3-61]
- _ = x[FMA4-62]
- _ = x[FP128-63]
- _ = x[FP256-64]
- _ = x[FSRM-65]
- _ = x[FXSR-66]
- _ = x[FXSROPT-67]
- _ = x[GFNI-68]
- _ = x[HLE-69]
- _ = x[HRESET-70]
- _ = x[HTT-71]
- _ = x[HWA-72]
- _ = x[HYBRID_CPU-73]
- _ = x[HYPERVISOR-74]
- _ = x[IA32_ARCH_CAP-75]
- _ = x[IA32_CORE_CAP-76]
- _ = x[IBPB-77]
- _ = x[IBPB_BRTYPE-78]
- _ = x[IBRS-79]
- _ = x[IBRS_PREFERRED-80]
- _ = x[IBRS_PROVIDES_SMP-81]
- _ = x[IBS-82]
- _ = x[IBSBRNTRGT-83]
- _ = x[IBSFETCHSAM-84]
- _ = x[IBSFFV-85]
- _ = x[IBSOPCNT-86]
- _ = x[IBSOPCNTEXT-87]
- _ = x[IBSOPSAM-88]
- _ = x[IBSRDWROPCNT-89]
- _ = x[IBSRIPINVALIDCHK-90]
- _ = x[IBS_FETCH_CTLX-91]
- _ = x[IBS_OPDATA4-92]
- _ = x[IBS_OPFUSE-93]
- _ = x[IBS_PREVENTHOST-94]
- _ = x[IBS_ZEN4-95]
- _ = x[IDPRED_CTRL-96]
- _ = x[INT_WBINVD-97]
- _ = x[INVLPGB-98]
- _ = x[KEYLOCKER-99]
- _ = x[KEYLOCKERW-100]
- _ = x[LAHF-101]
- _ = x[LAM-102]
- _ = x[LBRVIRT-103]
- _ = x[LZCNT-104]
- _ = x[MCAOVERFLOW-105]
- _ = x[MCDT_NO-106]
- _ = x[MCOMMIT-107]
- _ = x[MD_CLEAR-108]
- _ = x[MMX-109]
- _ = x[MMXEXT-110]
- _ = x[MOVBE-111]
- _ = x[MOVDIR64B-112]
- _ = x[MOVDIRI-113]
- _ = x[MOVSB_ZL-114]
- _ = x[MOVU-115]
- _ = x[MPX-116]
- _ = x[MSRIRC-117]
- _ = x[MSRLIST-118]
- _ = x[MSR_PAGEFLUSH-119]
- _ = x[NRIPS-120]
- _ = x[NX-121]
- _ = x[OSXSAVE-122]
- _ = x[PCONFIG-123]
- _ = x[POPCNT-124]
- _ = x[PPIN-125]
- _ = x[PREFETCHI-126]
- _ = x[PSFD-127]
- _ = x[RDPRU-128]
- _ = x[RDRAND-129]
- _ = x[RDSEED-130]
- _ = x[RDTSCP-131]
- _ = x[RRSBA_CTRL-132]
- _ = x[RTM-133]
- _ = x[RTM_ALWAYS_ABORT-134]
- _ = x[SBPB-135]
- _ = x[SERIALIZE-136]
- _ = x[SEV-137]
- _ = x[SEV_64BIT-138]
- _ = x[SEV_ALTERNATIVE-139]
- _ = x[SEV_DEBUGSWAP-140]
- _ = x[SEV_ES-141]
- _ = x[SEV_RESTRICTED-142]
- _ = x[SEV_SNP-143]
- _ = x[SGX-144]
- _ = x[SGXLC-145]
- _ = x[SHA-146]
- _ = x[SME-147]
- _ = x[SME_COHERENT-148]
- _ = x[SPEC_CTRL_SSBD-149]
- _ = x[SRBDS_CTRL-150]
- _ = x[SRSO_MSR_FIX-151]
- _ = x[SRSO_NO-152]
- _ = x[SRSO_USER_KERNEL_NO-153]
- _ = x[SSE-154]
- _ = x[SSE2-155]
- _ = x[SSE3-156]
- _ = x[SSE4-157]
- _ = x[SSE42-158]
- _ = x[SSE4A-159]
- _ = x[SSSE3-160]
- _ = x[STIBP-161]
- _ = x[STIBP_ALWAYSON-162]
- _ = x[STOSB_SHORT-163]
- _ = x[SUCCOR-164]
- _ = x[SVM-165]
- _ = x[SVMDA-166]
- _ = x[SVMFBASID-167]
- _ = x[SVML-168]
- _ = x[SVMNP-169]
- _ = x[SVMPF-170]
- _ = x[SVMPFT-171]
- _ = x[SYSCALL-172]
- _ = x[SYSEE-173]
- _ = x[TBM-174]
- _ = x[TDX_GUEST-175]
- _ = x[TLB_FLUSH_NESTED-176]
- _ = x[TME-177]
- _ = x[TOPEXT-178]
- _ = x[TSCRATEMSR-179]
- _ = x[TSXLDTRK-180]
- _ = x[VAES-181]
- _ = x[VMCBCLEAN-182]
- _ = x[VMPL-183]
- _ = x[VMSA_REGPROT-184]
- _ = x[VMX-185]
- _ = x[VPCLMULQDQ-186]
- _ = x[VTE-187]
- _ = x[WAITPKG-188]
- _ = x[WBNOINVD-189]
- _ = x[WRMSRNS-190]
- _ = x[X87-191]
- _ = x[XGETBV1-192]
- _ = x[XOP-193]
- _ = x[XSAVE-194]
- _ = x[XSAVEC-195]
- _ = x[XSAVEOPT-196]
- _ = x[XSAVES-197]
- _ = x[AESARM-198]
- _ = x[ARMCPUID-199]
- _ = x[ASIMD-200]
- _ = x[ASIMDDP-201]
- _ = x[ASIMDHP-202]
- _ = x[ASIMDRDM-203]
- _ = x[ATOMICS-204]
- _ = x[CRC32-205]
- _ = x[DCPOP-206]
- _ = x[EVTSTRM-207]
- _ = x[FCMA-208]
- _ = x[FHM-209]
- _ = x[FP-210]
- _ = x[FPHP-211]
- _ = x[GPA-212]
- _ = x[JSCVT-213]
- _ = x[LRCPC-214]
- _ = x[PMULL-215]
- _ = x[RNDR-216]
- _ = x[TLB-217]
- _ = x[TS-218]
- _ = x[SHA1-219]
- _ = x[SHA2-220]
- _ = x[SHA3-221]
- _ = x[SHA512-222]
- _ = x[SM3-223]
- _ = x[SM4-224]
- _ = x[SVE-225]
- _ = x[lastID-226]
+ _ = x[AMXTRANSPOSE-12]
+ _ = x[APX_F-13]
+ _ = x[AVX-14]
+ _ = x[AVX10-15]
+ _ = x[AVX10_128-16]
+ _ = x[AVX10_256-17]
+ _ = x[AVX10_512-18]
+ _ = x[AVX2-19]
+ _ = x[AVX512BF16-20]
+ _ = x[AVX512BITALG-21]
+ _ = x[AVX512BW-22]
+ _ = x[AVX512CD-23]
+ _ = x[AVX512DQ-24]
+ _ = x[AVX512ER-25]
+ _ = x[AVX512F-26]
+ _ = x[AVX512FP16-27]
+ _ = x[AVX512IFMA-28]
+ _ = x[AVX512PF-29]
+ _ = x[AVX512VBMI-30]
+ _ = x[AVX512VBMI2-31]
+ _ = x[AVX512VL-32]
+ _ = x[AVX512VNNI-33]
+ _ = x[AVX512VP2INTERSECT-34]
+ _ = x[AVX512VPOPCNTDQ-35]
+ _ = x[AVXIFMA-36]
+ _ = x[AVXNECONVERT-37]
+ _ = x[AVXSLOW-38]
+ _ = x[AVXVNNI-39]
+ _ = x[AVXVNNIINT8-40]
+ _ = x[AVXVNNIINT16-41]
+ _ = x[BHI_CTRL-42]
+ _ = x[BMI1-43]
+ _ = x[BMI2-44]
+ _ = x[CETIBT-45]
+ _ = x[CETSS-46]
+ _ = x[CLDEMOTE-47]
+ _ = x[CLMUL-48]
+ _ = x[CLZERO-49]
+ _ = x[CMOV-50]
+ _ = x[CMPCCXADD-51]
+ _ = x[CMPSB_SCADBS_SHORT-52]
+ _ = x[CMPXCHG8-53]
+ _ = x[CPBOOST-54]
+ _ = x[CPPC-55]
+ _ = x[CX16-56]
+ _ = x[EFER_LMSLE_UNS-57]
+ _ = x[ENQCMD-58]
+ _ = x[ERMS-59]
+ _ = x[F16C-60]
+ _ = x[FLUSH_L1D-61]
+ _ = x[FMA3-62]
+ _ = x[FMA4-63]
+ _ = x[FP128-64]
+ _ = x[FP256-65]
+ _ = x[FSRM-66]
+ _ = x[FXSR-67]
+ _ = x[FXSROPT-68]
+ _ = x[GFNI-69]
+ _ = x[HLE-70]
+ _ = x[HRESET-71]
+ _ = x[HTT-72]
+ _ = x[HWA-73]
+ _ = x[HYBRID_CPU-74]
+ _ = x[HYPERVISOR-75]
+ _ = x[IA32_ARCH_CAP-76]
+ _ = x[IA32_CORE_CAP-77]
+ _ = x[IBPB-78]
+ _ = x[IBPB_BRTYPE-79]
+ _ = x[IBRS-80]
+ _ = x[IBRS_PREFERRED-81]
+ _ = x[IBRS_PROVIDES_SMP-82]
+ _ = x[IBS-83]
+ _ = x[IBSBRNTRGT-84]
+ _ = x[IBSFETCHSAM-85]
+ _ = x[IBSFFV-86]
+ _ = x[IBSOPCNT-87]
+ _ = x[IBSOPCNTEXT-88]
+ _ = x[IBSOPSAM-89]
+ _ = x[IBSRDWROPCNT-90]
+ _ = x[IBSRIPINVALIDCHK-91]
+ _ = x[IBS_FETCH_CTLX-92]
+ _ = x[IBS_OPDATA4-93]
+ _ = x[IBS_OPFUSE-94]
+ _ = x[IBS_PREVENTHOST-95]
+ _ = x[IBS_ZEN4-96]
+ _ = x[IDPRED_CTRL-97]
+ _ = x[INT_WBINVD-98]
+ _ = x[INVLPGB-99]
+ _ = x[KEYLOCKER-100]
+ _ = x[KEYLOCKERW-101]
+ _ = x[LAHF-102]
+ _ = x[LAM-103]
+ _ = x[LBRVIRT-104]
+ _ = x[LZCNT-105]
+ _ = x[MCAOVERFLOW-106]
+ _ = x[MCDT_NO-107]
+ _ = x[MCOMMIT-108]
+ _ = x[MD_CLEAR-109]
+ _ = x[MMX-110]
+ _ = x[MMXEXT-111]
+ _ = x[MOVBE-112]
+ _ = x[MOVDIR64B-113]
+ _ = x[MOVDIRI-114]
+ _ = x[MOVSB_ZL-115]
+ _ = x[MOVU-116]
+ _ = x[MPX-117]
+ _ = x[MSRIRC-118]
+ _ = x[MSRLIST-119]
+ _ = x[MSR_PAGEFLUSH-120]
+ _ = x[NRIPS-121]
+ _ = x[NX-122]
+ _ = x[OSXSAVE-123]
+ _ = x[PCONFIG-124]
+ _ = x[POPCNT-125]
+ _ = x[PPIN-126]
+ _ = x[PREFETCHI-127]
+ _ = x[PSFD-128]
+ _ = x[RDPRU-129]
+ _ = x[RDRAND-130]
+ _ = x[RDSEED-131]
+ _ = x[RDTSCP-132]
+ _ = x[RRSBA_CTRL-133]
+ _ = x[RTM-134]
+ _ = x[RTM_ALWAYS_ABORT-135]
+ _ = x[SBPB-136]
+ _ = x[SERIALIZE-137]
+ _ = x[SEV-138]
+ _ = x[SEV_64BIT-139]
+ _ = x[SEV_ALTERNATIVE-140]
+ _ = x[SEV_DEBUGSWAP-141]
+ _ = x[SEV_ES-142]
+ _ = x[SEV_RESTRICTED-143]
+ _ = x[SEV_SNP-144]
+ _ = x[SGX-145]
+ _ = x[SGXLC-146]
+ _ = x[SHA-147]
+ _ = x[SME-148]
+ _ = x[SME_COHERENT-149]
+ _ = x[SM3_X86-150]
+ _ = x[SM4_X86-151]
+ _ = x[SPEC_CTRL_SSBD-152]
+ _ = x[SRBDS_CTRL-153]
+ _ = x[SRSO_MSR_FIX-154]
+ _ = x[SRSO_NO-155]
+ _ = x[SRSO_USER_KERNEL_NO-156]
+ _ = x[SSE-157]
+ _ = x[SSE2-158]
+ _ = x[SSE3-159]
+ _ = x[SSE4-160]
+ _ = x[SSE42-161]
+ _ = x[SSE4A-162]
+ _ = x[SSSE3-163]
+ _ = x[STIBP-164]
+ _ = x[STIBP_ALWAYSON-165]
+ _ = x[STOSB_SHORT-166]
+ _ = x[SUCCOR-167]
+ _ = x[SVM-168]
+ _ = x[SVMDA-169]
+ _ = x[SVMFBASID-170]
+ _ = x[SVML-171]
+ _ = x[SVMNP-172]
+ _ = x[SVMPF-173]
+ _ = x[SVMPFT-174]
+ _ = x[SYSCALL-175]
+ _ = x[SYSEE-176]
+ _ = x[TBM-177]
+ _ = x[TDX_GUEST-178]
+ _ = x[TLB_FLUSH_NESTED-179]
+ _ = x[TME-180]
+ _ = x[TOPEXT-181]
+ _ = x[TSCRATEMSR-182]
+ _ = x[TSXLDTRK-183]
+ _ = x[VAES-184]
+ _ = x[VMCBCLEAN-185]
+ _ = x[VMPL-186]
+ _ = x[VMSA_REGPROT-187]
+ _ = x[VMX-188]
+ _ = x[VPCLMULQDQ-189]
+ _ = x[VTE-190]
+ _ = x[WAITPKG-191]
+ _ = x[WBNOINVD-192]
+ _ = x[WRMSRNS-193]
+ _ = x[X87-194]
+ _ = x[XGETBV1-195]
+ _ = x[XOP-196]
+ _ = x[XSAVE-197]
+ _ = x[XSAVEC-198]
+ _ = x[XSAVEOPT-199]
+ _ = x[XSAVES-200]
+ _ = x[AESARM-201]
+ _ = x[ARMCPUID-202]
+ _ = x[ASIMD-203]
+ _ = x[ASIMDDP-204]
+ _ = x[ASIMDHP-205]
+ _ = x[ASIMDRDM-206]
+ _ = x[ATOMICS-207]
+ _ = x[CRC32-208]
+ _ = x[DCPOP-209]
+ _ = x[EVTSTRM-210]
+ _ = x[FCMA-211]
+ _ = x[FHM-212]
+ _ = x[FP-213]
+ _ = x[FPHP-214]
+ _ = x[GPA-215]
+ _ = x[JSCVT-216]
+ _ = x[LRCPC-217]
+ _ = x[PMULL-218]
+ _ = x[RNDR-219]
+ _ = x[TLB-220]
+ _ = x[TS-221]
+ _ = x[SHA1-222]
+ _ = x[SHA2-223]
+ _ = x[SHA3-224]
+ _ = x[SHA512-225]
+ _ = x[SM3-226]
+ _ = x[SM4-227]
+ _ = x[SVE-228]
+ _ = x[lastID-229]
_ = x[firstID-0]
}
-const _FeatureID_name = "firstIDADXAESNIAMD3DNOWAMD3DNOWEXTAMXBF16AMXFP16AMXINT8AMXFP8AMXTILEAMXTF32AMXCOMPLEXAPX_FAVXAVX10AVX10_128AVX10_256AVX10_512AVX2AVX512BF16AVX512BITALGAVX512BWAVX512CDAVX512DQAVX512ERAVX512FAVX512FP16AVX512IFMAAVX512PFAVX512VBMIAVX512VBMI2AVX512VLAVX512VNNIAVX512VP2INTERSECTAVX512VPOPCNTDQAVXIFMAAVXNECONVERTAVXSLOWAVXVNNIAVXVNNIINT8AVXVNNIINT16BHI_CTRLBMI1BMI2CETIBTCETSSCLDEMOTECLMULCLZEROCMOVCMPCCXADDCMPSB_SCADBS_SHORTCMPXCHG8CPBOOSTCPPCCX16EFER_LMSLE_UNSENQCMDERMSF16CFLUSH_L1DFMA3FMA4FP128FP256FSRMFXSRFXSROPTGFNIHLEHRESETHTTHWAHYBRID_CPUHYPERVISORIA32_ARCH_CAPIA32_CORE_CAPIBPBIBPB_BRTYPEIBRSIBRS_PREFERREDIBRS_PROVIDES_SMPIBSIBSBRNTRGTIBSFETCHSAMIBSFFVIBSOPCNTIBSOPCNTEXTIBSOPSAMIBSRDWROPCNTIBSRIPINVALIDCHKIBS_FETCH_CTLXIBS_OPDATA4IBS_OPFUSEIBS_PREVENTHOSTIBS_ZEN4IDPRED_CTRLINT_WBINVDINVLPGBKEYLOCKERKEYLOCKERWLAHFLAMLBRVIRTLZCNTMCAOVERFLOWMCDT_NOMCOMMITMD_CLEARMMXMMXEXTMOVBEMOVDIR64BMOVDIRIMOVSB_ZLMOVUMPXMSRIRCMSRLISTMSR_PAGEFLUSHNRIPSNXOSXSAVEPCONFIGPOPCNTPPINPREFETCHIPSFDRDPRURDRANDRDSEEDRDTSCPRRSBA_CTRLRTMRTM_ALWAYS_ABORTSBPBSERIALIZESEVSEV_64BITSEV_ALTERNATIVESEV_DEBUGSWAPSEV_ESSEV_RESTRICTEDSEV_SNPSGXSGXLCSHASMESME_COHERENTSPEC_CTRL_SSBDSRBDS_CTRLSRSO_MSR_FIXSRSO_NOSRSO_USER_KERNEL_NOSSESSE2SSE3SSE4SSE42SSE4ASSSE3STIBPSTIBP_ALWAYSONSTOSB_SHORTSUCCORSVMSVMDASVMFBASIDSVMLSVMNPSVMPFSVMPFTSYSCALLSYSEETBMTDX_GUESTTLB_FLUSH_NESTEDTMETOPEXTTSCRATEMSRTSXLDTRKVAESVMCBCLEANVMPLVMSA_REGPROTVMXVPCLMULQDQVTEWAITPKGWBNOINVDWRMSRNSX87XGETBV1XOPXSAVEXSAVECXSAVEOPTXSAVESAESARMARMCPUIDASIMDASIMDDPASIMDHPASIMDRDMATOMICSCRC32DCPOPEVTSTRMFCMAFHMFPFPHPGPAJSCVTLRCPCPMULLRNDRTLBTSSHA1SHA2SHA3SHA512SM3SM4SVElastID"
+const _FeatureID_name = "firstIDADXAESNIAMD3DNOWAMD3DNOWEXTAMXBF16AMXFP16AMXINT8AMXFP8AMXTILEAMXTF32AMXCOMPLEXAMXTRANSPOSEAPX_FAVXAVX10AVX10_128AVX10_256AVX10_512AVX2AVX512BF16AVX512BITALGAVX512BWAVX512CDAVX512DQAVX512ERAVX512FAVX512FP16AVX512IFMAAVX512PFAVX512VBMIAVX512VBMI2AVX512VLAVX512VNNIAVX512VP2INTERSECTAVX512VPOPCNTDQAVXIFMAAVXNECONVERTAVXSLOWAVXVNNIAVXVNNIINT8AVXVNNIINT16BHI_CTRLBMI1BMI2CETIBTCETSSCLDEMOTECLMULCLZEROCMOVCMPCCXADDCMPSB_SCADBS_SHORTCMPXCHG8CPBOOSTCPPCCX16EFER_LMSLE_UNSENQCMDERMSF16CFLUSH_L1DFMA3FMA4FP128FP256FSRMFXSRFXSROPTGFNIHLEHRESETHTTHWAHYBRID_CPUHYPERVISORIA32_ARCH_CAPIA32_CORE_CAPIBPBIBPB_BRTYPEIBRSIBRS_PREFERREDIBRS_PROVIDES_SMPIBSIBSBRNTRGTIBSFETCHSAMIBSFFVIBSOPCNTIBSOPCNTEXTIBSOPSAMIBSRDWROPCNTIBSRIPINVALIDCHKIBS_FETCH_CTLXIBS_OPDATA4IBS_OPFUSEIBS_PREVENTHOSTIBS_ZEN4IDPRED_CTRLINT_WBINVDINVLPGBKEYLOCKERKEYLOCKERWLAHFLAMLBRVIRTLZCNTMCAOVERFLOWMCDT_NOMCOMMITMD_CLEARMMXMMXEXTMOVBEMOVDIR64BMOVDIRIMOVSB_ZLMOVUMPXMSRIRCMSRLISTMSR_PAGEFLUSHNRIPSNXOSXSAVEPCONFIGPOPCNTPPINPREFETCHIPSFDRDPRURDRANDRDSEEDRDTSCPRRSBA_CTRLRTMRTM_ALWAYS_ABORTSBPBSERIALIZESEVSEV_64BITSEV_ALTERNATIVESEV_DEBUGSWAPSEV_ESSEV_RESTRICTEDSEV_SNPSGXSGXLCSHASMESME_COHERENTSM3_X86SM4_X86SPEC_CTRL_SSBDSRBDS_CTRLSRSO_MSR_FIXSRSO_NOSRSO_USER_KERNEL_NOSSESSE2SSE3SSE4SSE42SSE4ASSSE3STIBPSTIBP_ALWAYSONSTOSB_SHORTSUCCORSVMSVMDASVMFBASIDSVMLSVMNPSVMPFSVMPFTSYSCALLSYSEETBMTDX_GUESTTLB_FLUSH_NESTEDTMETOPEXTTSCRATEMSRTSXLDTRKVAESVMCBCLEANVMPLVMSA_REGPROTVMXVPCLMULQDQVTEWAITPKGWBNOINVDWRMSRNSX87XGETBV1XOPXSAVEXSAVECXSAVEOPTXSAVESAESARMARMCPUIDASIMDASIMDDPASIMDHPASIMDRDMATOMICSCRC32DCPOPEVTSTRMFCMAFHMFPFPHPGPAJSCVTLRCPCPMULLRNDRTLBTSSHA1SHA2SHA3SHA512SM3SM4SVElastID"
-var _FeatureID_index = [...]uint16{0, 7, 10, 15, 23, 34, 41, 48, 55, 61, 68, 75, 85, 90, 93, 98, 107, 116, 125, 129, 139, 151, 159, 167, 175, 183, 190, 200, 210, 218, 228, 239, 247, 257, 275, 290, 297, 309, 316, 323, 334, 346, 354, 358, 362, 368, 373, 381, 386, 392, 396, 405, 423, 431, 438, 442, 446, 460, 466, 470, 474, 483, 487, 491, 496, 501, 505, 509, 516, 520, 523, 529, 532, 535, 545, 555, 568, 581, 585, 596, 600, 614, 631, 634, 644, 655, 661, 669, 680, 688, 700, 716, 730, 741, 751, 766, 774, 785, 795, 802, 811, 821, 825, 828, 835, 840, 851, 858, 865, 873, 876, 882, 887, 896, 903, 911, 915, 918, 924, 931, 944, 949, 951, 958, 965, 971, 975, 984, 988, 993, 999, 1005, 1011, 1021, 1024, 1040, 1044, 1053, 1056, 1065, 1080, 1093, 1099, 1113, 1120, 1123, 1128, 1131, 1134, 1146, 1160, 1170, 1182, 1189, 1208, 1211, 1215, 1219, 1223, 1228, 1233, 1238, 1243, 1257, 1268, 1274, 1277, 1282, 1291, 1295, 1300, 1305, 1311, 1318, 1323, 1326, 1335, 1351, 1354, 1360, 1370, 1378, 1382, 1391, 1395, 1407, 1410, 1420, 1423, 1430, 1438, 1445, 1448, 1455, 1458, 1463, 1469, 1477, 1483, 1489, 1497, 1502, 1509, 1516, 1524, 1531, 1536, 1541, 1548, 1552, 1555, 1557, 1561, 1564, 1569, 1574, 1579, 1583, 1586, 1588, 1592, 1596, 1600, 1606, 1609, 1612, 1615, 1621}
+var _FeatureID_index = [...]uint16{0, 7, 10, 15, 23, 34, 41, 48, 55, 61, 68, 75, 85, 97, 102, 105, 110, 119, 128, 137, 141, 151, 163, 171, 179, 187, 195, 202, 212, 222, 230, 240, 251, 259, 269, 287, 302, 309, 321, 328, 335, 346, 358, 366, 370, 374, 380, 385, 393, 398, 404, 408, 417, 435, 443, 450, 454, 458, 472, 478, 482, 486, 495, 499, 503, 508, 513, 517, 521, 528, 532, 535, 541, 544, 547, 557, 567, 580, 593, 597, 608, 612, 626, 643, 646, 656, 667, 673, 681, 692, 700, 712, 728, 742, 753, 763, 778, 786, 797, 807, 814, 823, 833, 837, 840, 847, 852, 863, 870, 877, 885, 888, 894, 899, 908, 915, 923, 927, 930, 936, 943, 956, 961, 963, 970, 977, 983, 987, 996, 1000, 1005, 1011, 1017, 1023, 1033, 1036, 1052, 1056, 1065, 1068, 1077, 1092, 1105, 1111, 1125, 1132, 1135, 1140, 1143, 1146, 1158, 1165, 1172, 1186, 1196, 1208, 1215, 1234, 1237, 1241, 1245, 1249, 1254, 1259, 1264, 1269, 1283, 1294, 1300, 1303, 1308, 1317, 1321, 1326, 1331, 1337, 1344, 1349, 1352, 1361, 1377, 1380, 1386, 1396, 1404, 1408, 1417, 1421, 1433, 1436, 1446, 1449, 1456, 1464, 1471, 1474, 1481, 1484, 1489, 1495, 1503, 1509, 1515, 1523, 1528, 1535, 1542, 1550, 1557, 1562, 1567, 1574, 1578, 1581, 1583, 1587, 1590, 1595, 1600, 1605, 1609, 1612, 1614, 1618, 1622, 1626, 1632, 1635, 1638, 1641, 1647}
func (i FeatureID) String() string {
if i < 0 || i >= FeatureID(len(_FeatureID_index)-1) {
diff --git a/vendor/github.com/klauspost/cpuid/v2/os_darwin_arm64.go b/vendor/github.com/klauspost/cpuid/v2/os_darwin_arm64.go
index 6f0b33ca6..da07522e7 100644
--- a/vendor/github.com/klauspost/cpuid/v2/os_darwin_arm64.go
+++ b/vendor/github.com/klauspost/cpuid/v2/os_darwin_arm64.go
@@ -65,9 +65,16 @@ func sysctlGetInt64(unknown int, names ...string) int {
return unknown
}
-func setFeature(c *CPUInfo, name string, feature FeatureID) {
- c.featureSet.setIf(sysctlGetBool(name), feature)
+func setFeature(c *CPUInfo, feature FeatureID, aliases ...string) {
+ for _, alias := range aliases {
+ set := sysctlGetBool(alias)
+ c.featureSet.setIf(set, feature)
+ if set {
+ break
+ }
+ }
}
+
func tryToFillCPUInfoFomSysctl(c *CPUInfo) {
c.BrandName = sysctlGetString("machdep.cpu.brand_string")
@@ -87,41 +94,36 @@ func tryToFillCPUInfoFomSysctl(c *CPUInfo) {
c.Cache.L2 = sysctlGetInt64(-1, "hw.l2cachesize")
c.Cache.L3 = sysctlGetInt64(-1, "hw.l3cachesize")
- // from https://developer.arm.com/downloads/-/exploration-tools/feature-names-for-a-profile
- setFeature(c, "hw.optional.arm.FEAT_AES", AESARM)
- setFeature(c, "hw.optional.AdvSIMD", ASIMD)
- setFeature(c, "hw.optional.arm.FEAT_DotProd", ASIMDDP)
- setFeature(c, "hw.optional.arm.FEAT_RDM", ASIMDRDM)
- setFeature(c, "hw.optional.FEAT_CRC32", CRC32)
- setFeature(c, "hw.optional.arm.FEAT_DPB", DCPOP)
- // setFeature(c, "", EVTSTRM)
- setFeature(c, "hw.optional.arm.FEAT_FCMA", FCMA)
- setFeature(c, "hw.optional.arm.FEAT_FHM", FHM)
- setFeature(c, "hw.optional.arm.FEAT_FP", FP)
- setFeature(c, "hw.optional.arm.FEAT_FP16", FPHP)
- setFeature(c, "hw.optional.arm.FEAT_PAuth", GPA)
- setFeature(c, "hw.optional.arm.FEAT_RNG", RNDR)
- setFeature(c, "hw.optional.arm.FEAT_JSCVT", JSCVT)
- setFeature(c, "hw.optional.arm.FEAT_LRCPC", LRCPC)
- setFeature(c, "hw.optional.arm.FEAT_PMULL", PMULL)
- setFeature(c, "hw.optional.arm.FEAT_SHA1", SHA1)
- setFeature(c, "hw.optional.arm.FEAT_SHA256", SHA2)
- setFeature(c, "hw.optional.arm.FEAT_SHA3", SHA3)
- setFeature(c, "hw.optional.arm.FEAT_SHA512", SHA512)
- setFeature(c, "hw.optional.arm.FEAT_TLBIOS", TLB)
- setFeature(c, "hw.optional.arm.FEAT_TLBIRANGE", TLB)
- setFeature(c, "hw.optional.arm.FEAT_FlagM", TS)
- setFeature(c, "hw.optional.arm.FEAT_FlagM2", TS)
- // setFeature(c, "", SM3)
- // setFeature(c, "", SM4)
- setFeature(c, "hw.optional.arm.FEAT_SVE", SVE)
-
- // from empirical observation
- setFeature(c, "hw.optional.AdvSIMD_HPFPCvt", ASIMDHP)
- setFeature(c, "hw.optional.armv8_1_atomics", ATOMICS)
- setFeature(c, "hw.optional.floatingpoint", FP)
- setFeature(c, "hw.optional.armv8_2_sha3", SHA3)
- setFeature(c, "hw.optional.armv8_2_sha512", SHA512)
- setFeature(c, "hw.optional.armv8_3_compnum", FCMA)
- setFeature(c, "hw.optional.armv8_crc32", CRC32)
+ // ARM features:
+ //
+ // Note: On some Apple Silicon system, some feats have aliases. See:
+ // https://developer.apple.com/documentation/kernel/1387446-sysctlbyname/determining_instruction_set_characteristics
+ // When so, we look at all aliases and consider a feature available when at least one identifier matches.
+ setFeature(c, AESARM, "hw.optional.arm.FEAT_AES") // AES instructions
+ setFeature(c, ASIMD, "hw.optional.arm.AdvSIMD", "hw.optional.neon") // Advanced SIMD
+ setFeature(c, ASIMDDP, "hw.optional.arm.FEAT_DotProd") // SIMD Dot Product
+ setFeature(c, ASIMDHP, "hw.optional.arm.AdvSIMD_HPFPCvt", "hw.optional.neon_hpfp") // Advanced SIMD half-precision floating point
+ setFeature(c, ASIMDRDM, "hw.optional.arm.FEAT_RDM") // Rounding Double Multiply Accumulate/Subtract
+ setFeature(c, ATOMICS, "hw.optional.arm.FEAT_LSE", "hw.optional.armv8_1_atomics") // Large System Extensions (LSE)
+ setFeature(c, CRC32, "hw.optional.arm.FEAT_CRC32", "hw.optional.armv8_crc32") // CRC32/CRC32C instructions
+ setFeature(c, DCPOP, "hw.optional.arm.FEAT_DPB") // Data cache clean to Point of Persistence (DC CVAP)
+ setFeature(c, EVTSTRM, "hw.optional.arm.FEAT_ECV") // Generic timer
+ setFeature(c, FCMA, "hw.optional.arm.FEAT_FCMA", "hw.optional.armv8_3_compnum") // Floating point complex number addition and multiplication
+ setFeature(c, FHM, "hw.optional.armv8_2_fhm", "hw.optional.arm.FEAT_FHM") // FMLAL and FMLSL instructions
+ setFeature(c, FP, "hw.optional.floatingpoint") // Single-precision and double-precision floating point
+ setFeature(c, FPHP, "hw.optional.arm.FEAT_FP16", "hw.optional.neon_fp16") // Half-precision floating point
+ setFeature(c, GPA, "hw.optional.arm.FEAT_PAuth") // Generic Pointer Authentication
+ setFeature(c, JSCVT, "hw.optional.arm.FEAT_JSCVT") // Javascript-style double->int convert (FJCVTZS)
+ setFeature(c, LRCPC, "hw.optional.arm.FEAT_LRCPC") // Weaker release consistency (LDAPR, etc)
+ setFeature(c, PMULL, "hw.optional.arm.FEAT_PMULL") // Polynomial Multiply instructions (PMULL/PMULL2)
+ setFeature(c, RNDR, "hw.optional.arm.FEAT_RNG") // Random Number instructions
+ setFeature(c, TLB, "hw.optional.arm.FEAT_TLBIOS", "hw.optional.arm.FEAT_TLBIRANGE") // Outer Shareable and TLB range maintenance instructions
+ setFeature(c, TS, "hw.optional.arm.FEAT_FlagM", "hw.optional.arm.FEAT_FlagM2") // Flag manipulation instructions
+ setFeature(c, SHA1, "hw.optional.arm.FEAT_SHA1") // SHA-1 instructions (SHA1C, etc)
+ setFeature(c, SHA2, "hw.optional.arm.FEAT_SHA256") // SHA-2 instructions (SHA256H, etc)
+ setFeature(c, SHA3, "hw.optional.arm.FEAT_SHA3") // SHA-3 instructions (EOR3, RAXI, XAR, BCAX)
+ setFeature(c, SHA512, "hw.optional.arm.FEAT_SHA512") // SHA512 instructions
+ setFeature(c, SM3, "hw.optional.arm.FEAT_SM3") // SM3 instructions
+ setFeature(c, SM4, "hw.optional.arm.FEAT_SM4") // SM4 instructions
+ setFeature(c, SVE, "hw.optional.arm.FEAT_SVE") // Scalable Vector Extension
}
generated by cgit v1.2.3 (git 2.46.0) at 2025-12-02 16:35:36 +0000