From 3ac1ee16f377d31a0fb80c8dae28b6239ac4229e Mon Sep 17 00:00:00 2001 From: Terin Stock Date: Sun, 9 Mar 2025 17:47:56 +0100 Subject: [chore] remove vendor --- .../twitchyliquid64/golang-asm/obj/arm64/doc.go | 249 --------------------- 1 file changed, 249 deletions(-) delete mode 100644 vendor/github.com/twitchyliquid64/golang-asm/obj/arm64/doc.go (limited to 'vendor/github.com/twitchyliquid64/golang-asm/obj/arm64/doc.go') diff --git a/vendor/github.com/twitchyliquid64/golang-asm/obj/arm64/doc.go b/vendor/github.com/twitchyliquid64/golang-asm/obj/arm64/doc.go deleted file mode 100644 index 751521754..000000000 --- a/vendor/github.com/twitchyliquid64/golang-asm/obj/arm64/doc.go +++ /dev/null @@ -1,249 +0,0 @@ -// Copyright 2018 The Go Authors. All rights reserved. -// Use of this source code is governed by a BSD-style -// license that can be found in the LICENSE file. - -/* -Package arm64 implements an ARM64 assembler. Go assembly syntax is different from GNU ARM64 -syntax, but we can still follow the general rules to map between them. - -Instructions mnemonics mapping rules - -1. Most instructions use width suffixes of instruction names to indicate operand width rather than -using different register names. - - Examples: - ADC R24, R14, R12 <=> adc x12, x24 - ADDW R26->24, R21, R15 <=> add w15, w21, w26, asr #24 - FCMPS F2, F3 <=> fcmp s3, s2 - FCMPD F2, F3 <=> fcmp d3, d2 - FCVTDH F2, F3 <=> fcvt h3, d2 - -2. Go uses .P and .W suffixes to indicate post-increment and pre-increment. - - Examples: - MOVD.P -8(R10), R8 <=> ldr x8, [x10],#-8 - MOVB.W 16(R16), R10 <=> ldrsb x10, [x16,#16]! - MOVBU.W 16(R16), R10 <=> ldrb x10, [x16,#16]! - -3. Go uses a series of MOV instructions as load and store. - -64-bit variant ldr, str, stur => MOVD; -32-bit variant str, stur, ldrsw => MOVW; -32-bit variant ldr => MOVWU; -ldrb => MOVBU; ldrh => MOVHU; -ldrsb, sturb, strb => MOVB; -ldrsh, sturh, strh => MOVH. - -4. Go moves conditions into opcode suffix, like BLT. - -5. Go adds a V prefix for most floating-point and SIMD instructions, except cryptographic extension -instructions and floating-point(scalar) instructions. - - Examples: - VADD V5.H8, V18.H8, V9.H8 <=> add v9.8h, v18.8h, v5.8h - VLD1.P (R6)(R11), [V31.D1] <=> ld1 {v31.1d}, [x6], x11 - VFMLA V29.S2, V20.S2, V14.S2 <=> fmla v14.2s, v20.2s, v29.2s - AESD V22.B16, V19.B16 <=> aesd v19.16b, v22.16b - SCVTFWS R3, F16 <=> scvtf s17, w6 - -6. Align directive - -Go asm supports the PCALIGN directive, which indicates that the next instruction should be aligned -to a specified boundary by padding with NOOP instruction. The alignment value supported on arm64 -must be a power of 2 and in the range of [8, 2048]. - - Examples: - PCALIGN $16 - MOVD $2, R0 // This instruction is aligned with 16 bytes. - PCALIGN $1024 - MOVD $3, R1 // This instruction is aligned with 1024 bytes. - -PCALIGN also changes the function alignment. If a function has one or more PCALIGN directives, -its address will be aligned to the same or coarser boundary, which is the maximum of all the -alignment values. - -In the following example, the function Add is aligned with 128 bytes. - Examples: - TEXT ·Add(SB),$40-16 - MOVD $2, R0 - PCALIGN $32 - MOVD $4, R1 - PCALIGN $128 - MOVD $8, R2 - RET - -On arm64, functions in Go are aligned to 16 bytes by default, we can also use PCALGIN to set the -function alignment. The functions that need to be aligned are preferably using NOFRAME and NOSPLIT -to avoid the impact of the prologues inserted by the assembler, so that the function address will -have the same alignment as the first hand-written instruction. - -In the following example, PCALIGN at the entry of the function Add will align its address to 2048 bytes. - - Examples: - TEXT ·Add(SB),NOSPLIT|NOFRAME,$0 - PCALIGN $2048 - MOVD $1, R0 - MOVD $1, R1 - RET - -Special Cases. - -(1) umov is written as VMOV. - -(2) br is renamed JMP, blr is renamed CALL. - -(3) No need to add "W" suffix: LDARB, LDARH, LDAXRB, LDAXRH, LDTRH, LDXRB, LDXRH. - -(4) In Go assembly syntax, NOP is a zero-width pseudo-instruction serves generic purpose, nothing -related to real ARM64 instruction. NOOP serves for the hardware nop instruction. NOOP is an alias of -HINT $0. - - Examples: - VMOV V13.B[1], R20 <=> mov x20, v13.b[1] - VMOV V13.H[1], R20 <=> mov w20, v13.h[1] - JMP (R3) <=> br x3 - CALL (R17) <=> blr x17 - LDAXRB (R19), R16 <=> ldaxrb w16, [x19] - NOOP <=> nop - - -Register mapping rules - -1. All basic register names are written as Rn. - -2. Go uses ZR as the zero register and RSP as the stack pointer. - -3. Bn, Hn, Dn, Sn and Qn instructions are written as Fn in floating-point instructions and as Vn -in SIMD instructions. - - -Argument mapping rules - -1. The operands appear in left-to-right assignment order. - -Go reverses the arguments of most instructions. - - Examples: - ADD R11.SXTB<<1, RSP, R25 <=> add x25, sp, w11, sxtb #1 - VADD V16, V19, V14 <=> add d14, d19, d16 - -Special Cases. - -(1) Argument order is the same as in the GNU ARM64 syntax: cbz, cbnz and some store instructions, -such as str, stur, strb, sturb, strh, sturh stlr, stlrb. stlrh, st1. - - Examples: - MOVD R29, 384(R19) <=> str x29, [x19,#384] - MOVB.P R30, 30(R4) <=> strb w30, [x4],#30 - STLRH R21, (R19) <=> stlrh w21, [x19] - -(2) MADD, MADDW, MSUB, MSUBW, SMADDL, SMSUBL, UMADDL, UMSUBL , , , - - Examples: - MADD R2, R30, R22, R6 <=> madd x6, x22, x2, x30 - SMSUBL R10, R3, R17, R27 <=> smsubl x27, w17, w10, x3 - -(3) FMADDD, FMADDS, FMSUBD, FMSUBS, FNMADDD, FNMADDS, FNMSUBD, FNMSUBS , , , - - Examples: - FMADDD F30, F20, F3, F29 <=> fmadd d29, d3, d30, d20 - FNMSUBS F7, F25, F7, F22 <=> fnmsub s22, s7, s7, s25 - -(4) BFI, BFXIL, SBFIZ, SBFX, UBFIZ, UBFX $, , $, - - Examples: - BFIW $16, R20, $6, R0 <=> bfi w0, w20, #16, #6 - UBFIZ $34, R26, $5, R20 <=> ubfiz x20, x26, #34, #5 - -(5) FCCMPD, FCCMPS, FCCMPED, FCCMPES , Fm. Fn, $ - - Examples: - FCCMPD AL, F8, F26, $0 <=> fccmp d26, d8, #0x0, al - FCCMPS VS, F29, F4, $4 <=> fccmp s4, s29, #0x4, vs - FCCMPED LE, F20, F5, $13 <=> fccmpe d5, d20, #0xd, le - FCCMPES NE, F26, F10, $0 <=> fccmpe s10, s26, #0x0, ne - -(6) CCMN, CCMNW, CCMP, CCMPW , , $, $ - - Examples: - CCMP MI, R22, $12, $13 <=> ccmp x22, #0xc, #0xd, mi - CCMNW AL, R1, $11, $8 <=> ccmn w1, #0xb, #0x8, al - -(7) CCMN, CCMNW, CCMP, CCMPW , , , $ - - Examples: - CCMN VS, R13, R22, $10 <=> ccmn x13, x22, #0xa, vs - CCMPW HS, R19, R14, $11 <=> ccmp w19, w14, #0xb, cs - -(9) CSEL, CSELW, CSNEG, CSNEGW, CSINC, CSINCW , , , ; -FCSELD, FCSELS , , , - - Examples: - CSEL GT, R0, R19, R1 <=> csel x1, x0, x19, gt - CSNEGW GT, R7, R17, R8 <=> csneg w8, w7, w17, gt - FCSELD EQ, F15, F18, F16 <=> fcsel d16, d15, d18, eq - -(10) TBNZ, TBZ $, ,