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-rw-r--r--vendor/github.com/minio/crc64nvme/LICENSE202
-rw-r--r--vendor/github.com/minio/crc64nvme/README.md20
-rw-r--r--vendor/github.com/minio/crc64nvme/crc64.go180
-rw-r--r--vendor/github.com/minio/crc64nvme/crc64_amd64.go15
-rw-r--r--vendor/github.com/minio/crc64nvme/crc64_amd64.s155
-rw-r--r--vendor/github.com/minio/crc64nvme/crc64_arm64.go15
-rw-r--r--vendor/github.com/minio/crc64nvme/crc64_arm64.s155
-rw-r--r--vendor/github.com/minio/crc64nvme/crc64_other.go9
-rw-r--r--vendor/github.com/minio/minio-go/v7/api.go2
-rw-r--r--vendor/github.com/minio/minio-go/v7/checksum.go7
10 files changed, 755 insertions, 5 deletions
diff --git a/vendor/github.com/minio/crc64nvme/LICENSE b/vendor/github.com/minio/crc64nvme/LICENSE
new file mode 100644
index 000000000..d64569567
--- /dev/null
+++ b/vendor/github.com/minio/crc64nvme/LICENSE
@@ -0,0 +1,202 @@
+
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diff --git a/vendor/github.com/minio/crc64nvme/README.md b/vendor/github.com/minio/crc64nvme/README.md
new file mode 100644
index 000000000..977dfcc88
--- /dev/null
+++ b/vendor/github.com/minio/crc64nvme/README.md
@@ -0,0 +1,20 @@
+
+## crc64nvme
+
+This Golang package calculates CRC64 checksums using carryless-multiplication accelerated with SIMD instructions for both ARM and x86. It is based on the NVME polynomial as specified in the [NVM Express® NVM Command Set Specification](https://nvmexpress.org/wp-content/uploads/NVM-Express-NVM-Command-Set-Specification-1.0d-2023.12.28-Ratified.pdf).
+
+The code is based on the [crc64fast-nvme](https://github.com/awesomized/crc64fast-nvme.git) package in Rust and is released under the Apache 2.0 license.
+
+For more background on the exact technique used, see this [Fast CRC Computation for Generic Polynomials Using PCLMULQDQ Instruction](https://web.archive.org/web/20131224125630/https://www.intel.com/content/dam/www/public/us/en/documents/white-papers/fast-crc-computation-generic-polynomials-pclmulqdq-paper.pdf) paper.
+
+### Performance
+
+To follow.
+
+### Requirements
+
+All Go versions >= 1.22 are supported.
+
+### Contributing
+
+Contributions are welcome, please send PRs for any enhancements.
diff --git a/vendor/github.com/minio/crc64nvme/crc64.go b/vendor/github.com/minio/crc64nvme/crc64.go
new file mode 100644
index 000000000..40ac28c76
--- /dev/null
+++ b/vendor/github.com/minio/crc64nvme/crc64.go
@@ -0,0 +1,180 @@
+// Copyright (c) 2025 Minio Inc. All rights reserved.
+// Use of this source code is governed by a license that can be
+// found in the LICENSE file.
+
+// Package crc64nvme implements the 64-bit cyclic redundancy check with NVME polynomial.
+package crc64nvme
+
+import (
+ "encoding/binary"
+ "errors"
+ "hash"
+ "sync"
+ "unsafe"
+)
+
+const (
+ // The size of a CRC-64 checksum in bytes.
+ Size = 8
+
+ // The NVME polynoimial (reversed, as used by Go)
+ NVME = 0x9a6c9329ac4bc9b5
+)
+
+var (
+ // precalculated table.
+ nvmeTable = makeTable(NVME)
+)
+
+// table is a 256-word table representing the polynomial for efficient processing.
+type table [256]uint64
+
+var (
+ slicing8TablesBuildOnce sync.Once
+ slicing8TableNVME *[8]table
+)
+
+func buildSlicing8TablesOnce() {
+ slicing8TablesBuildOnce.Do(buildSlicing8Tables)
+}
+
+func buildSlicing8Tables() {
+ slicing8TableNVME = makeSlicingBy8Table(makeTable(NVME))
+}
+
+func makeTable(poly uint64) *table {
+ t := new(table)
+ for i := 0; i < 256; i++ {
+ crc := uint64(i)
+ for j := 0; j < 8; j++ {
+ if crc&1 == 1 {
+ crc = (crc >> 1) ^ poly
+ } else {
+ crc >>= 1
+ }
+ }
+ t[i] = crc
+ }
+ return t
+}
+
+func makeSlicingBy8Table(t *table) *[8]table {
+ var helperTable [8]table
+ helperTable[0] = *t
+ for i := 0; i < 256; i++ {
+ crc := t[i]
+ for j := 1; j < 8; j++ {
+ crc = t[crc&0xff] ^ (crc >> 8)
+ helperTable[j][i] = crc
+ }
+ }
+ return &helperTable
+}
+
+// digest represents the partial evaluation of a checksum.
+type digest struct {
+ crc uint64
+}
+
+// New creates a new hash.Hash64 computing the CRC-64 checksum using the
+// NVME polynomial. Its Sum method will lay the
+// value out in big-endian byte order. The returned Hash64 also
+// implements [encoding.BinaryMarshaler] and [encoding.BinaryUnmarshaler] to
+// marshal and unmarshal the internal state of the hash.
+func New() hash.Hash64 { return &digest{0} }
+
+func (d *digest) Size() int { return Size }
+
+func (d *digest) BlockSize() int { return 1 }
+
+func (d *digest) Reset() { d.crc = 0 }
+
+const (
+ magic = "crc\x02"
+ marshaledSize = len(magic) + 8 + 8
+)
+
+func (d *digest) MarshalBinary() ([]byte, error) {
+ b := make([]byte, 0, marshaledSize)
+ b = append(b, magic...)
+ b = binary.BigEndian.AppendUint64(b, tableSum)
+ b = binary.BigEndian.AppendUint64(b, d.crc)
+ return b, nil
+}
+
+func (d *digest) UnmarshalBinary(b []byte) error {
+ if len(b) < len(magic) || string(b[:len(magic)]) != magic {
+ return errors.New("hash/crc64: invalid hash state identifier")
+ }
+ if len(b) != marshaledSize {
+ return errors.New("hash/crc64: invalid hash state size")
+ }
+ if tableSum != binary.BigEndian.Uint64(b[4:]) {
+ return errors.New("hash/crc64: tables do not match")
+ }
+ d.crc = binary.BigEndian.Uint64(b[12:])
+ return nil
+}
+
+func update(crc uint64, p []byte) uint64 {
+ if hasAsm && len(p) > 127 {
+ ptr := unsafe.Pointer(&p[0])
+ if align := (uintptr(ptr)+15)&^0xf - uintptr(ptr); align > 0 {
+ // Align to 16-byte boundary.
+ crc = update(crc, p[:align])
+ p = p[align:]
+ }
+ runs := len(p) / 128
+ crc = updateAsm(crc, p[:128*runs])
+ return update(crc, p[128*runs:])
+ }
+
+ buildSlicing8TablesOnce()
+ crc = ^crc
+ // table comparison is somewhat expensive, so avoid it for small sizes
+ for len(p) >= 64 {
+ var helperTable = slicing8TableNVME
+ // Update using slicing-by-8
+ for len(p) > 8 {
+ crc ^= binary.LittleEndian.Uint64(p)
+ crc = helperTable[7][crc&0xff] ^
+ helperTable[6][(crc>>8)&0xff] ^
+ helperTable[5][(crc>>16)&0xff] ^
+ helperTable[4][(crc>>24)&0xff] ^
+ helperTable[3][(crc>>32)&0xff] ^
+ helperTable[2][(crc>>40)&0xff] ^
+ helperTable[1][(crc>>48)&0xff] ^
+ helperTable[0][crc>>56]
+ p = p[8:]
+ }
+ }
+ // For reminders or small sizes
+ for _, v := range p {
+ crc = nvmeTable[byte(crc)^v] ^ (crc >> 8)
+ }
+ return ^crc
+}
+
+// Update returns the result of adding the bytes in p to the crc.
+func Update(crc uint64, p []byte) uint64 {
+ return update(crc, p)
+}
+
+func (d *digest) Write(p []byte) (n int, err error) {
+ d.crc = update(d.crc, p)
+ return len(p), nil
+}
+
+func (d *digest) Sum64() uint64 { return d.crc }
+
+func (d *digest) Sum(in []byte) []byte {
+ s := d.Sum64()
+ return append(in, byte(s>>56), byte(s>>48), byte(s>>40), byte(s>>32), byte(s>>24), byte(s>>16), byte(s>>8), byte(s))
+}
+
+// Checksum returns the CRC-64 checksum of data
+// using the NVME polynomial.
+func Checksum(data []byte) uint64 { return update(0, data) }
+
+// ISO tablesum of NVME poly
+const tableSum = 0x8ddd9ee4402c7163
diff --git a/vendor/github.com/minio/crc64nvme/crc64_amd64.go b/vendor/github.com/minio/crc64nvme/crc64_amd64.go
new file mode 100644
index 000000000..fc8538bc3
--- /dev/null
+++ b/vendor/github.com/minio/crc64nvme/crc64_amd64.go
@@ -0,0 +1,15 @@
+// Copyright (c) 2025 Minio Inc. All rights reserved.
+// Use of this source code is governed by a license that can be
+// found in the LICENSE file.
+
+//go:build !noasm && !appengine && !gccgo
+
+package crc64nvme
+
+import (
+ "github.com/klauspost/cpuid/v2"
+)
+
+var hasAsm = cpuid.CPU.Supports(cpuid.SSE2, cpuid.CLMUL, cpuid.SSE4)
+
+func updateAsm(crc uint64, p []byte) (checksum uint64)
diff --git a/vendor/github.com/minio/crc64nvme/crc64_amd64.s b/vendor/github.com/minio/crc64nvme/crc64_amd64.s
new file mode 100644
index 000000000..04d8cf786
--- /dev/null
+++ b/vendor/github.com/minio/crc64nvme/crc64_amd64.s
@@ -0,0 +1,155 @@
+// Copyright (c) 2025 Minio Inc. All rights reserved.
+// Use of this source code is governed by a license that can be
+// found in the LICENSE file.
+
+#include "textflag.h"
+
+TEXT ·updateAsm(SB), $0-40
+ MOVQ crc+0(FP), AX // checksum
+ MOVQ p_base+8(FP), SI // start pointer
+ MOVQ p_len+16(FP), CX // length of buffer
+ NOTQ AX
+ SHRQ $7, CX
+ CMPQ CX, $1
+ JLT skip128
+
+ VMOVDQA 0x00(SI), X0
+ VMOVDQA 0x10(SI), X1
+ VMOVDQA 0x20(SI), X2
+ VMOVDQA 0x30(SI), X3
+ VMOVDQA 0x40(SI), X4
+ VMOVDQA 0x50(SI), X5
+ VMOVDQA 0x60(SI), X6
+ VMOVDQA 0x70(SI), X7
+ MOVQ AX, X8
+ PXOR X8, X0
+ CMPQ CX, $1
+ JE tail128
+
+ MOVQ $0xa1ca681e733f9c40, AX
+ MOVQ AX, X8
+ MOVQ $0x5f852fb61e8d92dc, AX
+ PINSRQ $0x1, AX, X9
+
+loop128:
+ ADDQ $128, SI
+ SUBQ $1, CX
+ VMOVDQA X0, X10
+ PCLMULQDQ $0x00, X8, X10
+ PCLMULQDQ $0x11, X9, X0
+ PXOR X10, X0
+ PXOR 0(SI), X0
+ VMOVDQA X1, X10
+ PCLMULQDQ $0x00, X8, X10
+ PCLMULQDQ $0x11, X9, X1
+ PXOR X10, X1
+ PXOR 0x10(SI), X1
+ VMOVDQA X2, X10
+ PCLMULQDQ $0x00, X8, X10
+ PCLMULQDQ $0x11, X9, X2
+ PXOR X10, X2
+ PXOR 0x20(SI), X2
+ VMOVDQA X3, X10
+ PCLMULQDQ $0x00, X8, X10
+ PCLMULQDQ $0x11, X9, X3
+ PXOR X10, X3
+ PXOR 0x30(SI), X3
+ VMOVDQA X4, X10
+ PCLMULQDQ $0x00, X8, X10
+ PCLMULQDQ $0x11, X9, X4
+ PXOR X10, X4
+ PXOR 0x40(SI), X4
+ VMOVDQA X5, X10
+ PCLMULQDQ $0x00, X8, X10
+ PCLMULQDQ $0x11, X9, X5
+ PXOR X10, X5
+ PXOR 0x50(SI), X5
+ VMOVDQA X6, X10
+ PCLMULQDQ $0x00, X8, X10
+ PCLMULQDQ $0x11, X9, X6
+ PXOR X10, X6
+ PXOR 0x60(SI), X6
+ VMOVDQA X7, X10
+ PCLMULQDQ $0x00, X8, X10
+ PCLMULQDQ $0x11, X9, X7
+ PXOR X10, X7
+ PXOR 0x70(SI), X7
+ CMPQ CX, $1
+ JGT loop128
+
+tail128:
+ MOVQ $0xd083dd594d96319d, AX
+ MOVQ AX, X11
+ PCLMULQDQ $0x00, X0, X11
+ MOVQ $0x946588403d4adcbc, AX
+ PINSRQ $0x1, AX, X12
+ PCLMULQDQ $0x11, X12, X0
+ PXOR X11, X7
+ PXOR X0, X7
+ MOVQ $0x3c255f5ebc414423, AX
+ MOVQ AX, X11
+ PCLMULQDQ $0x00, X1, X11
+ MOVQ $0x34f5a24e22d66e90, AX
+ PINSRQ $0x1, AX, X12
+ PCLMULQDQ $0x11, X12, X1
+ PXOR X11, X1
+ PXOR X7, X1
+ MOVQ $0x7b0ab10dd0f809fe, AX
+ MOVQ AX, X11
+ PCLMULQDQ $0x00, X2, X11
+ MOVQ $0x03363823e6e791e5, AX
+ PINSRQ $0x1, AX, X12
+ PCLMULQDQ $0x11, X12, X2
+ PXOR X11, X2
+ PXOR X1, X2
+ MOVQ $0x0c32cdb31e18a84a, AX
+ MOVQ AX, X11
+ PCLMULQDQ $0x00, X3, X11
+ MOVQ $0x62242240ace5045a, AX
+ PINSRQ $0x1, AX, X12
+ PCLMULQDQ $0x11, X12, X3
+ PXOR X11, X3
+ PXOR X2, X3
+ MOVQ $0xbdd7ac0ee1a4a0f0, AX
+ MOVQ AX, X11
+ PCLMULQDQ $0x00, X4, X11
+ MOVQ $0xa3ffdc1fe8e82a8b, AX
+ PINSRQ $0x1, AX, X12
+ PCLMULQDQ $0x11, X12, X4
+ PXOR X11, X4
+ PXOR X3, X4
+ MOVQ $0xb0bc2e589204f500, AX
+ MOVQ AX, X11
+ PCLMULQDQ $0x00, X5, X11
+ MOVQ $0xe1e0bb9d45d7a44c, AX
+ PINSRQ $0x1, AX, X12
+ PCLMULQDQ $0x11, X12, X5
+ PXOR X11, X5
+ PXOR X4, X5
+ MOVQ $0xeadc41fd2ba3d420, AX
+ MOVQ AX, X11
+ PCLMULQDQ $0x00, X6, X11
+ MOVQ $0x21e9761e252621ac, AX
+ PINSRQ $0x1, AX, X12
+ PCLMULQDQ $0x11, X12, X6
+ PXOR X11, X6
+ PXOR X5, X6
+ MOVQ AX, X5
+ PCLMULQDQ $0x00, X6, X5
+ PSHUFD $0xee, X6, X6
+ PXOR X5, X6
+ MOVQ $0x27ecfa329aef9f77, AX
+ MOVQ AX, X4
+ PCLMULQDQ $0x00, X4, X6
+ PEXTRQ $0, X6, BX
+ MOVQ $0x34d926535897936b, AX
+ MOVQ AX, X4
+ PCLMULQDQ $0x00, X4, X6
+ PXOR X5, X6
+ PEXTRQ $1, X6, AX
+ XORQ BX, AX
+
+skip128:
+ NOTQ AX
+ MOVQ AX, checksum+32(FP)
+ RET
diff --git a/vendor/github.com/minio/crc64nvme/crc64_arm64.go b/vendor/github.com/minio/crc64nvme/crc64_arm64.go
new file mode 100644
index 000000000..c77c819ce
--- /dev/null
+++ b/vendor/github.com/minio/crc64nvme/crc64_arm64.go
@@ -0,0 +1,15 @@
+// Copyright (c) 2025 Minio Inc. All rights reserved.
+// Use of this source code is governed by a license that can be
+// found in the LICENSE file.
+
+//go:build !noasm && !appengine && !gccgo
+
+package crc64nvme
+
+import (
+ "github.com/klauspost/cpuid/v2"
+)
+
+var hasAsm = cpuid.CPU.Supports(cpuid.ASIMD) && cpuid.CPU.Supports(cpuid.PMULL)
+
+func updateAsm(crc uint64, p []byte) (checksum uint64)
diff --git a/vendor/github.com/minio/crc64nvme/crc64_arm64.s b/vendor/github.com/minio/crc64nvme/crc64_arm64.s
new file mode 100644
index 000000000..b61866f63
--- /dev/null
+++ b/vendor/github.com/minio/crc64nvme/crc64_arm64.s
@@ -0,0 +1,155 @@
+// Copyright (c) 2025 Minio Inc. All rights reserved.
+// Use of this source code is governed by a license that can be
+// found in the LICENSE file.
+
+#include "textflag.h"
+
+TEXT ·updateAsm(SB), $0-40
+ MOVD crc+0(FP), R0 // checksum
+ MOVD p_base+8(FP), R1 // start pointer
+ MOVD p_len+16(FP), R2 // length of buffer
+ MOVD $·const(SB), R3 // constants
+ MVN R0, R0
+ LSR $7, R2, R2
+ CMP $1, R2
+ BLT skip128
+
+ FLDPQ (R1), (F0, F1)
+ FLDPQ 32(R1), (F2, F3)
+ FLDPQ 64(R1), (F4, F5)
+ FLDPQ 96(R1), (F6, F7)
+ FMOVD R0, F8
+ VMOVI $0, V9.B16
+ VMOV V9.D[0], V8.D[1]
+ VEOR V8.B16, V0.B16, V0.B16
+ CMP $1, R2
+ BEQ tail128
+
+ MOVD 112(R3), R4
+ MOVD 120(R3), R5
+ FMOVD R4, F8
+ VDUP R5, V9.D2
+
+loop128:
+ ADD $128, R1, R1
+ SUB $1, R2, R2
+ VPMULL V0.D1, V8.D1, V10.Q1
+ VPMULL2 V0.D2, V9.D2, V0.Q1
+ FLDPQ (R1), (F11, F12)
+ VEOR3 V0.B16, V11.B16, V10.B16, V0.B16
+ VPMULL V1.D1, V8.D1, V10.Q1
+ VPMULL2 V1.D2, V9.D2, V1.Q1
+ VEOR3 V1.B16, V12.B16, V10.B16, V1.B16
+ VPMULL V2.D1, V8.D1, V10.Q1
+ VPMULL2 V2.D2, V9.D2, V2.Q1
+ FLDPQ 32(R1), (F11, F12)
+ VEOR3 V2.B16, V11.B16, V10.B16, V2.B16
+ VPMULL V3.D1, V8.D1, V10.Q1
+ VPMULL2 V3.D2, V9.D2, V3.Q1
+ VEOR3 V3.B16, V12.B16, V10.B16, V3.B16
+ VPMULL V4.D1, V8.D1, V10.Q1
+ VPMULL2 V4.D2, V9.D2, V4.Q1
+ FLDPQ 64(R1), (F11, F12)
+ VEOR3 V4.B16, V11.B16, V10.B16, V4.B16
+ VPMULL V5.D1, V8.D1, V10.Q1
+ VPMULL2 V5.D2, V9.D2, V5.Q1
+ VEOR3 V5.B16, V12.B16, V10.B16, V5.B16
+ VPMULL V6.D1, V8.D1, V10.Q1
+ VPMULL2 V6.D2, V9.D2, V6.Q1
+ FLDPQ 96(R1), (F11, F12)
+ VEOR3 V6.B16, V11.B16, V10.B16, V6.B16
+ VPMULL V7.D1, V8.D1, V10.Q1
+ VPMULL2 V7.D2, V9.D2, V7.Q1
+ VEOR3 V7.B16, V12.B16, V10.B16, V7.B16
+ CMP $1, R2
+ BHI loop128
+
+tail128:
+ MOVD (R3), R4
+ FMOVD R4, F11
+ VPMULL V0.D1, V11.D1, V11.Q1
+ MOVD 8(R3), R4
+ VDUP R4, V12.D2
+ VPMULL2 V0.D2, V12.D2, V0.Q1
+ VEOR3 V0.B16, V7.B16, V11.B16, V7.B16
+ MOVD 16(R3), R4
+ FMOVD R4, F11
+ VPMULL V1.D1, V11.D1, V11.Q1
+ MOVD 24(R3), R4
+ VDUP R4, V12.D2
+ VPMULL2 V1.D2, V12.D2, V1.Q1
+ VEOR3 V1.B16, V11.B16, V7.B16, V1.B16
+ MOVD 32(R3), R4
+ FMOVD R4, F11
+ VPMULL V2.D1, V11.D1, V11.Q1
+ MOVD 40(R3), R4
+ VDUP R4, V12.D2
+ VPMULL2 V2.D2, V12.D2, V2.Q1
+ VEOR3 V2.B16, V11.B16, V1.B16, V2.B16
+ MOVD 48(R3), R4
+ FMOVD R4, F11
+ VPMULL V3.D1, V11.D1, V11.Q1
+ MOVD 56(R3), R4
+ VDUP R4, V12.D2
+ VPMULL2 V3.D2, V12.D2, V3.Q1
+ VEOR3 V3.B16, V11.B16, V2.B16, V3.B16
+ MOVD 64(R3), R4
+ FMOVD R4, F11
+ VPMULL V4.D1, V11.D1, V11.Q1
+ MOVD 72(R3), R4
+ VDUP R4, V12.D2
+ VPMULL2 V4.D2, V12.D2, V4.Q1
+ VEOR3 V4.B16, V11.B16, V3.B16, V4.B16
+ MOVD 80(R3), R4
+ FMOVD R4, F11
+ VPMULL V5.D1, V11.D1, V11.Q1
+ MOVD 88(R3), R4
+ VDUP R4, V12.D2
+ VPMULL2 V5.D2, V12.D2, V5.Q1
+ VEOR3 V5.B16, V11.B16, V4.B16, V5.B16
+ MOVD 96(R3), R4
+ FMOVD R4, F11
+ VPMULL V6.D1, V11.D1, V11.Q1
+ MOVD 104(R3), R4
+ VDUP R4, V12.D2
+ VPMULL2 V6.D2, V12.D2, V6.Q1
+ VEOR3 V6.B16, V11.B16, V5.B16, V6.B16
+ FMOVD R4, F5
+ VPMULL V6.D1, V5.D1, V5.Q1
+ VDUP V6.D[1], V6.D2
+ VEOR V5.B8, V6.B8, V6.B8
+ MOVD 128(R3), R4
+ FMOVD R4, F4
+ VPMULL V4.D1, V6.D1, V6.Q1
+ FMOVD F6, R4
+ MOVD 136(R3), R5
+ FMOVD R5, F4
+ VPMULL V4.D1, V6.D1, V6.Q1
+ VEOR V6.B16, V5.B16, V6.B16
+ VMOV V6.D[1], R5
+ EOR R4, R5, R0
+
+skip128:
+ MVN R0, R0
+ MOVD R0, checksum+32(FP)
+ RET
+
+DATA ·const+0x000(SB)/8, $0xd083dd594d96319d // K_959
+DATA ·const+0x008(SB)/8, $0x946588403d4adcbc // K_895
+DATA ·const+0x010(SB)/8, $0x3c255f5ebc414423 // K_831
+DATA ·const+0x018(SB)/8, $0x34f5a24e22d66e90 // K_767
+DATA ·const+0x020(SB)/8, $0x7b0ab10dd0f809fe // K_703
+DATA ·const+0x028(SB)/8, $0x03363823e6e791e5 // K_639
+DATA ·const+0x030(SB)/8, $0x0c32cdb31e18a84a // K_575
+DATA ·const+0x038(SB)/8, $0x62242240ace5045a // K_511
+DATA ·const+0x040(SB)/8, $0xbdd7ac0ee1a4a0f0 // K_447
+DATA ·const+0x048(SB)/8, $0xa3ffdc1fe8e82a8b // K_383
+DATA ·const+0x050(SB)/8, $0xb0bc2e589204f500 // K_319
+DATA ·const+0x058(SB)/8, $0xe1e0bb9d45d7a44c // K_255
+DATA ·const+0x060(SB)/8, $0xeadc41fd2ba3d420 // K_191
+DATA ·const+0x068(SB)/8, $0x21e9761e252621ac // K_127
+DATA ·const+0x070(SB)/8, $0xa1ca681e733f9c40 // K_1087
+DATA ·const+0x078(SB)/8, $0x5f852fb61e8d92dc // K_1023
+DATA ·const+0x080(SB)/8, $0x27ecfa329aef9f77 // MU
+DATA ·const+0x088(SB)/8, $0x34d926535897936b // POLY
+GLOBL ·const(SB), (NOPTR+RODATA), $144
diff --git a/vendor/github.com/minio/crc64nvme/crc64_other.go b/vendor/github.com/minio/crc64nvme/crc64_other.go
new file mode 100644
index 000000000..1d78d7431
--- /dev/null
+++ b/vendor/github.com/minio/crc64nvme/crc64_other.go
@@ -0,0 +1,9 @@
+// Copyright (c) 2025 Minio Inc. All rights reserved.
+// Use of this source code is governed by a license that can be
+// found in the LICENSE file.
+
+//go:build (!amd64 || noasm || appengine || gccgo) && (!arm64 || noasm || appengine || gccgo)
+
+package crc64nvme
+
+var hasAsm = false
diff --git a/vendor/github.com/minio/minio-go/v7/api.go b/vendor/github.com/minio/minio-go/v7/api.go
index ff9f69118..1b4842ad1 100644
--- a/vendor/github.com/minio/minio-go/v7/api.go
+++ b/vendor/github.com/minio/minio-go/v7/api.go
@@ -155,7 +155,7 @@ type Options struct {
// Global constants.
const (
libraryName = "minio-go"
- libraryVersion = "v7.0.85"
+ libraryVersion = "v7.0.86"
)
// User Agent should always following the below style.
diff --git a/vendor/github.com/minio/minio-go/v7/checksum.go b/vendor/github.com/minio/minio-go/v7/checksum.go
index 8e4c27ce4..c7456cda2 100644
--- a/vendor/github.com/minio/minio-go/v7/checksum.go
+++ b/vendor/github.com/minio/minio-go/v7/checksum.go
@@ -30,6 +30,8 @@ import (
"math/bits"
"net/http"
"sort"
+
+ "github.com/minio/crc64nvme"
)
// ChecksumType contains information about the checksum type.
@@ -152,9 +154,6 @@ func (c ChecksumType) RawByteLen() int {
const crc64NVMEPolynomial = 0xad93d23594c93659
-// crc64 uses reversed polynomials.
-var crc64Table = crc64.MakeTable(bits.Reverse64(crc64NVMEPolynomial))
-
// Hasher returns a hasher corresponding to the checksum type.
// Returns nil if no checksum.
func (c ChecksumType) Hasher() hash.Hash {
@@ -168,7 +167,7 @@ func (c ChecksumType) Hasher() hash.Hash {
case ChecksumSHA256:
return sha256.New()
case ChecksumCRC64NVME:
- return crc64.New(crc64Table)
+ return crc64nvme.New()
}
return nil
}